LAR             Load Access Rights                   Flags: O D I T S Z A P C
- - - - - * - - -
LAR destination,source CPU: 286+ p

Logic dest16 ← (bits 32-47 of descriptor) AND FF00h
or dest32 ← (bits 32-63 of descriptor) AND 00F0FF00h
if error
ZF ← 0
else
ZF ← 1
endif

This instruction reads a masked form of a segment descriptor and
returns the following bits to the destination register:

Bits Contents
dest32 | 23 Granularity
| 22 Default Operation Size
| 20 Programmer-available
| 15 Segment Present |
| 14-13 DPL |
| 12 Segment | dest16
| 11-9 Type |
| 8 Accessed |
| (Other bits zero) |


The descriptor specified by the selector in the first operand must
be within the descriptor table limits, have a valid type field,
and be accessible at both CPL (Current Privilege Level) and RPL
(Requestor's Privilege Level) of the selector in the second
operand compared to DPL (Descriptor Privilege Level). If so, ZF is
set to 1 and the segment attributes are loaded to the first
operand. If not, ZF is set to zero, and the first operand is
unmodified (due to privilege or GDT or LDT limits).

If the 32-bit operand size is specified, the entire 32-bit value
is loaded into the 32-bit destination. If the 16-bit operand size
is specified, the lower 16 bits of this value are stored in the
16-bit destination register.

The following special-segment and gate-descriptor types are valid
for LAR: 1,2,3,4,5,6,7,9,B,C,E,F. All application code and data
segment descriptors are valid.


Example: sub eax,eax
mov ax,cs
mov ebx,eax
lar eax,ebx


Opcode Format
0F 02 /r LAR r16,r/m16
0F 02 /r LAR r32,r/m32


Length and timing
Operands Bytes 8088 186 286 386 486 Pentium
r16, r16 3 14 15 11 8 NP
r32, r32 3 - 15 11 8 NP
r16, m16 3 16 16 11 8 NP
r32, m32 3 - 16 11 8 NP