VERR            Verify Read                          Flags: O D I T S Z A P C
VERW Verify Write - - - - - * - - -

VERR selector CPU: 286+ p
VERW selector CPU: 286+ p

Logic if segment accessible
ZF ← 1
else
ZF ← 0
endif

These instructions verify whether the segment denoted by the
selector in the word-sized operand can be reached with the current
privilege level (CPL) and if the segment is readable (VERR) or
writable (VERW). If the segment is accessible, the zero flag (ZF)
is set to 1; if not, ZF is reset to 0.

To set ZF=1, the following conditions must be met:
■ The selector must denote a descriptor within the bounds of
the table (GDT or LDT); the selector must be "defined".
■ The selector must denote the descriptor of a code or data
segment (not that of a task state segment, LDT, or a gate).
■ For VERR, the segment must be readable. For VERW, the segment
must be a writable data segment.
■ If the code segment is readable and conforming, the
descriptor privilege level (DPL) can be any value for VERR.
Otherwise, the DPL must be greater than or equal to (have
less or the same privilege as) both the current privilege
level (CPL) and the selector's RPL.


The validation performed is the same as if the segment were loaded
into DS,ES,FS, or GS, and the indicated access (read or write)
were performed. Because the zero flag receives the result of the
validation, the selector's value cannot result in a protection
exception. Thus, software can anticipate possible segment access
problems.


Opcode Format
0F 00 /4 VERR r/m16
0F 00 /5 VERW r/m16


Length and timing
Operands Bytes 8088 186 286 386 486 Pentium
VERR r16 3 14 10 11 7 NP
VERR mem16 3+d(0,2) 16 11 11 7 NP
VERW r16 3 14 15 11 7 NP
VERW mem16 3+d(0,2) 16 16 11 7 NP