Line compare           index 18h  CRTC

Layout  b7-b0  LC   Line compare

        This register allows split-screen display.

        When the line counter is equal to the 10-bit line-compare
        value, the refresh address will be cleared, causing the
        horizontal display lines beneath the line compare value to be
        refreshed from display memory address 0. The effect is a
        dual-screen operation. This register contains the low-order
        eight bits of the line-compare value; bit 8 and 9 are found in
        the Overflow and Max scan line registers.


        Refreshed from  > ┌─────────────────────────────┐ Row 0
        address in        │                             │
        Start Address     │          Screen 0           │
        registers         │                             │
                          │                             │
        Refreshed from  > ├─────────────────────────────┤ Row = Line
        address 0         │                             │   compare
                          │          Screen 1           │
                          │                             │
                          │                             │
                          └─────────────────────────────┛ Max. rows