Int 1A Fn B10A - Pci Bios V2.0c+ - Read Configuration Dword (Cont.)
2 PLE enable processing of Periodic List in next frame
1-0 CBSR Control Bulk Service Ratio
00 1:1 Control EDs:Bulk EDs served
01 2:1
10 3:1
11 4:1
See Also: #0827,#0828,#0830
Bitfields for OpenHCI "HcCommandStatus" register:
Bit(s) Description (Table 0830)
31-18 reserved
17-16 SOC scheduling-overrun count
15-4 reserved
3 OCR ownership change request is pending
2 BLF bulk list contains TDs
1 CLF control list contains TDs
0 HCR host controller software reset
Note: writing a 1 bit sets the corresponding bit, while a 0 bit leaves the
corresponding bit unchanged
See Also: #0827,#0828,#0831
Bitfields for OpenHCI "HcInterruptStatus" register:
Bit(s) Description (Table 0831)
31 reserved (0)
30 OC ownership change
29-7 reserved
6 RHSC Root Hub status changed
5 FNO frame number overflowed
4 UE unrecoverable error
3 RD resume detected
2 SF start of frame
1 WDH writeback done
0 SO scheduling overrun
Note: writing a 1 bit clears the corresponding bit of the register
See Also: #0827,#0828,#0830,#0832
Bitfields for OpenHCI "HcInterruptEnable" and "HcInterruptDisable" registers:
Bit(s) Description (Table 0832)
31 MIE master interrupt enable
30 OC ownership change
29-7 reserved
6 RHSC Root Hub status change
5 FNO frame number overflow
4 UE unrecoverable error
3 RD Resume Detect
2 SF start of frame
1 WDH HcDoneHead writeback
0 SO scheduling overrun
Note: writing a 1 bit to HcInterruptEnable enables the corresponding
interrupt, while writing a 1 bit to HcInterruptDisable disables it;
zero bits are ignored. On reading, both registers return the
same value, which reflects the currently enabled interrupts
See Also: #0827
Bitfields for OpenHCI "HcHCCA" register:
Bit(s) Description (Table 0833)
31-8 physical address of Host Controller Communications Area (bits 31-8)
7-0 reserved (0)
Note: the required alignment for the HCCA may be determined by writing
FFFFFFFFh to this register and determining the number of low-order
zero bits
See Also: #0827,#0834,#0835
Bitfields for OpenHCI "HcPeriodCurrentED" register:
Bit(s) Description (Table 0834)
31-4 physical address of current Isochronous/Interrupt Endpoint Descriptor
(bits 31-4)
3-0 reserved (0)
See Also: #0827,#0833,#0835
Bitfields for OpenHCI "HcControlHeadED"/"HcControlCurrentED" register:
Bit(s) Description (Table 0835)
31-4 physical address of first/current Endpoint Descriptor (bits 31-4)
3-0 reserved (0)
Note: HcControlCurrentED is set to 0000000h to indicate the end of the
Control list
See Also: #0827,#0833,#0834
Bitfields for OpenHCI "HcBulkHeadED"/"HcBulkCurrentED" register:
Bit(s) Description (Table 0836)
31-4 physical address of first/current Endpoint Descriptor in the Bulk
list (bits 31-4)
3-0 reserved (0)
Note: HcBulkCurrentED is set to 0000000h to indicate the end of the Bulk
list
See Also: #0827,#0833,#0835
Bitfields for OpenHCI "HcDoneHead" register:
Bit(s) Description (Table 0837)
31-4 physical address of most-recently completed Transfer Descriptor added
to the Done queue (bits 31-4)
3-0 reserved (0)
See Also: #0827,#0834,#0836
Bitfields for OpenHCI "HcFmInterval" register:
Bit(s) Description (Table 0838)
31 "FIT" toggled each time a new value is loaded into bits 13-0
30-16 "FSMPS" largest data packet in bits
15-14 reserved
13-0 "FI" Frame Interval (between to consecutive SOFs)
See Also: #0827,#0839
Bitfields for OpenHCI "HcFmRemaining" register:
Bit(s) Description (Table 0839)
31 "FRT" loaded from bit 31 of HcFmInterval whenever FR reaches 0
30-14 reserved
13-0 "FR" FrameRemaining -- bits times left in current frame
See Also: #0827,#0838
Bitfields for OpenHCI "HcRhDescriptorA" register:
Bit(s) Description (Table 0840)
31-24 "POTPGT" power-on to power-good time in 2ms units
23-13 reserved
12 "NOCP" no over-current protection supported
11 "OCPM" over-current status reported per-port
10 "DT" device type - is root hub compound device?
9 "NPS" NoPowerSwitching -- ports are always powered up
8 "PSM" power-switching mode -- if set, each port powered individually
7-0 "NDP" number of downstream ports
See Also: #0827,#0841,#0842
Bitfields for OpenHCI "HcRhDescriptorB" register:
Bit(s) Description (Table 0841)
31-16 "PPCM" PortPowerControlMask -- bitmask of ports NOT affected by global
power control (bit 16 [port #0] is reserved)
15-0 "DR" DeviceRemovable -- bitmap of removable devices
See Also: #0827,#0840,#0842
Bitfields for OpenHCI "HcRhStatus" register:
Bit(s) Description (Table 0842)
31 "CRWE" Clear Remote Wakeup Enable
write 1 to disable remote wakeup (writes of 0 ignored)
30-18 reserved
17 "OCIC" OverCurrent Indicator Change
write 1 to clear
16 R "LPSC" Local Power Status Change
W Set Global Power mode (write 1; writes of 0 ignored)
15 "DRWE" Device Remote Wakeup Enable
write 1 to enable (writes of 0 ignored)
read to get current status
14-2 reserved
1 "OCI" OverCurrent Indicator
0 R "LPS" LocalPowerStatus (always 0 for Root Hub)
W write 1 to turn off power to all ports/ports with clear
PortPowerControlMask bits
See Also: #0827,#0840,#0841,#0843
Bitfields for OpenHCI "HcRhPortStatusN" register:
Bit(s) Description (Table 0843)
31-21 reserved
20 "PRSC" Port Reset Status Change (write '1' to clear)
19 "OCIC" Port OverCurrent Indiactor Change (write '1' to clear)
18 "PSSC" Port Suspend Status Change (write '1' to clear)
17 "PESC" Port Enable Status Change (write '1' to clear)
16 "CSC" Connect Status Change (write '1' to clear)
15-10 reserved
9 R "LSDA" Low Speed Device Attached
W clear port power by writing '1'
8 R "PPS" Port Power Status
W set port power by writing '1'
7-5 reserved
4 R "PRS" Port Reset Status
W set port reset by writing '1'
3 R "POCI" Port OverCurrent Indicator
W clear suspend status by writing '1'
2 R "PSS" Port Suspend Status
W set port suspend by writing '1'
1 R "PES" Port Enable Status
W set port enable by writing '1'
0 R "CCS" current connect status
W clear port enable by writing '1'
See Also: #0827,#0840,#0841,#0842