Format of S3 Streams Processor memory-mapped registers
Offset Size Description (Table M097)
8180h DWORD primary stream control (write-only)
bits 30-28: ??? (set to 7 for 32bpp, 5 for 5-6-5, 3 for 5-5-5,
0 for 8bpp)
Note: the primary stream is the output from the display RAM
8184h DWORD chroma key control (write-only)
bits 31-29: ???
bit 28: =1 strict chroma-key
=0 relaxed chroma-key
bit 27: ???
bits 26-24: ???
bits 23-0: chroma-key color value
Note: Win95 drivers write this register twice
8188h DWORD unused??? (high word seems to echo 8184h, low word 8180h)
818Ch DWORD unused??? (high word seems to echo 8184h, low word 8180h)
8190h DWORD secondary stream control (write-only)
bits 11-0: ??? (set to 2*inwidth-outwidth-1)
bits 27-12: ???
bits 29-28: scaling factor
(ratio between inwidth & outwidth:
03 = greater than 4
02 = 2 .. 4
01 = 1 .. 2
00 = other )
bit 30: ???
bit 31: ???
Note: the secondary stream is typically live video
8194h DWORD chroma key upper bound (write-only)
(actually, only bits 28-31 are write-only)
8198h DWORD secondary stream stretch (write-only)
(actually, only bits 27-31 are write-only)
bits 26-16: input width - output width
bit 11: ???
bits 10-0: input width - 1
(the above two fields together determine the actual stretch/
shrink factor)
819Ch DWORD ???
81A0h DWORD blend control (write-only) (see #M104)
81A4h 3 DWORDs unused??? (reads as FFFFFFFFh)
81B0h 4 DWORDs ???
81C0h DWORD primary frame buffer address 0
81C4h DWORD primary frame buffer address 1
81C8h DWORD primary stream stride (bits 11-0 only)
81CCh DWORD double buffer control (bit flags)
bit 0: ??? (if set, display messed up)
bit 1: secondary stream buffer select
=0 use frame buffer address 0 (81D0h)
=1 use frame buffer address 1 (81D4h)
bit 2: primary stream buffer select???
bit 3: ???
bit 4: ??? (if set, causes direct writes to video memory)
bits 6-5: ???
bits 31-7: ???
81D0h DWORD secondary frame buffer address 0
81D4h DWORD secondary frame buffer address 1
81D8h DWORD secondary stream stride (bits 11-0 only)
81DCh DWORD opaque overlay control (some bits seem to be read-only)
bit 31: ???
81E0h DWORD K1 -- vertical stretch (lines in)
(bits 10-0 only) set to one less than # lines in
81E4h DWORD K2 -- vertical stretch (stretch factor)
(bits 10-0 only) set to (#lines_in - #lines_out)
81E8h DWORD "DDA_vert" (bits 11-0 only) (lines out)
set to 1-(#lines_out)
81ECh DWORD streams FIFO
bit 2: ???
bit 3: ???
bit 6: ???
bit 7: ???
bit 12: ??? (if clear, DOS-box scrolls cause snow)
bit 13: ???
bit 14: ???
bits 18-15: ???
bit 19: ??? (set by Win95 driver when using ISA bus)
bits 22-20: ???
bits 31-23: read-only 0000
81F0h DWORD primary start coordinate
bits 26-16: X (column)
bits 10-0: Y (row)
other bits appear to be read-only
81F4h DWORD primary window size
bits 26-16: width
bits 10-0: height
other bits appear to be read-only
81F8h DWORD secondary start coordinate
bits 26-16: X (column)
bits 10-0: Y (row)
other bits appear to be read-only
81FCh DWORD secondary window size
bits 26-16: width
bits 10-0: height
other bits appear to be read-only
See Also: #M095,#M100,#M101
Bitfields for S3 Streams Processor blend control:
Bit(s) Description (Table M104)
31-27 unused???
26-24 blend type
000 show secondary stream (video) unconditionally
001 disable secondary stream
010 blend pri/sec. streams (secondary at full intensity)
011 blend pri/sec. streams
100 blank display
101 show secondary stream only where chroma-key color present
110 show secondary stream (video) unconditionally
111 blank display
23-13 unused???
12-8 primary stream intensity (04h-1Fh)
(values of 00h-03h force secondary stream to black)
4-0 secondary stream intensity (00h-1Fh)
(ignored for blend type 010)
See Also: #M097
--------V-MA0008200--------------------------
MEM A000h:8200h - S3 - MEMORY-MAPPED MEMORY-PORT CONTROL REGISTERS
Size: 40 BYTEs
Access: Write-Only ???
Note: the S3 graphics processor registers can be mapped at either
linear 000A0000h or at offset 16M from the start of the linear
frame buffer