Format of S3 packed memory-mapped registers

Offset  Size    Description     (Table M100)
8100h  DWORD   drawing control: row (low word), column (high word)
       "CUR_X" and "CUR_Y" (see PORT 82E8h,PORT 86E8h)
8104h  DWORD   ??? (written by STLTH64.DRV for Win95)
8108h  DWORD   drawing control: destination Y and axial step constant (low
         word), destination X and axial step constant (high)
       (see PORT 8AE8h,PORT 8EE8h)
810Ch  DWORD   ??? (written by STLTH64.DRV for Win95)
8110h  DWORD   error term
       (see PORT 92E8h)
8118h  DWORD   drawing control: command register
       (see PORT 9AE8h)
811Ch  DWORD   short stroke (see PORT 9EE8h)
8120h  DWORD   background color (see PORT A2E8h)
8124h  DWORD   foreground color (see PORT A6E8h)
8128h  DWORD   write mask (see PORT AAE8h)
812Ch  DWORD   read mask (see PORT AEE8h)
8130h  DWORD   color compare (see PORT B2E8h)
8134h  DWORD   background mix (low word) and foreground mix (high word)
       (see PORT B6E8h,PORT BAE8h)
8138h  DWORD   top scissors (low word) and left scissors (high word)
       (see PORT BEE8h,#P369)
813Ch  DWORD   bottom scissors (low word) and right scissors (high word)
       (see PORT BEE8h,#P369)
8140h  DWORD   data manipulation control (low word) and miscellaneous 2 (high
         word) (see PORT BEE8h,#P369)
8144h  DWORD   miscellaneous (low word) and read register select (high word)
       (see PORT BEE8h,#P369)
8148h  DWORD   minor axis pixel count (low word) and major axis pixel count
         (high word) (see PORT BEE8h,#P369,PORT 96E8h)
814Ch  DWORD   pixel data transfer (see PORT E2E8h)
8150h  WORD    ??? (written by STLTH64.DRV for Win95)
8164h  DWORD   ??? (written by STLTH64.DRV for Win95)
8168h  DWORD   ??? (written by STLTH64.DRV for Win95)
816Ch  DWORD   ??? (written by STLTH64.DRV for Win95)

Note:  setting 8138h to 0 and 813Ch to 12345678h may be a magic value to unlock
     some S3 features

See Also: #M095,#M101
--------V-MA0008180--------------------------
MEM A000h:8180h - S3 - STREAMS PROCESSOR
Size:  128 BYTEs

Note:  the S3 graphics processor registers can be mapped at either
     linear 000A0000h or at offset 16M from the start of the linear
     frame buffer