LMSW            Load Machine Status Word             Flags: Not altered

LMSW source                                          CPU: 286+ Priv

        Logic   MSW ← source            ; MSW is part of CR0

    LMSW loads the machine status word (MSW -- lower 16 bits of CR0)
    from the source operand. This instruction can be used to switch to
    protected mode by setting the protection enable bit (PE) to zero;
    if so, it must be followed by an intrasegment jump to flush the
    instruction queue. LMSW will not switch back to real-address
    mode (PE bit cannot be reset to 0 with an LMSW instruction).

    Note
    LMSW should be used only under 286-based systems; programs written
    for the 80386+ should load CR0 with a MOV instruction.

    For compatibility with the 80286, the extension type (ET) bit of
    MSW is not altered by LMSW when executed by 80386+.


    LMSW appears in operating system software; it is not used in
    application programs.


    Opcode      Format
    0F 01 /6    LMSW r/m16


    Length and timing
    Operands    Bytes   8088    186     286     386     486     Pentium
    r16           3                      3      10      13       8   NP
    mem16       3+d(0-2)                 6      13      13       8   NP