IDIV            Division, Signed                     Flags: O D I T S Z A P C
                                                            ? - - - ? ? ? ? ?
IDIV source

        Logic   AL ← AX / source
                AH ← remainder
             or
                AX ← DX:AX / source
                DX ← remainder
             or
                EAX ← EDX:EAX / source  ; 386+
                EDX ← remainder

    IDIV performs a signed division. The dividend, quotient, and
    remainder are implicitly allocated to fixed registers, while only
    the divisor is given as an explicit operand. The type of the
    divisor determines which registers are used. Non-integral
    quotients are truncated toward zero. The remainder has the same
    sign as the dividend.

        Size     Dividend  Divisor   Quotient  Remainder
        byte       AX       r/m8        AL        AH
        word      DX:AX     r/m16       AX        DX
        dword    EDX:EAX    r/m32       EAX       EDX   ; 386+


    Note
    If the resulting quotient is too large to fit in the destination,
    or if the divisor is zero, an interrupt 0 (divide by zero) is
    generated. If a divide-by-zero occurs, the quotient and remainder
    are undefined.


    Opcode      Format
    F6 /7       IDIV r/m8
    F7 /7       IDIV r/m16
    F7 /7       IDIV r/m32


    Length and timing
    Operands    Bytes   8088    186     286     386     486     Pentium
    r8           2     101-112    44-52   17     19     19      22   NP
    r16          2     165-184    53-61   25     27     27      30   NP
    r32          2       -          -      -     43     43      46   NP
    mem8    2+d(0-2)  107-118+EA  50-58   20     22     20      22   NP
    mem16   2+d(0-2)  171-190+EA  59-67   28     30     28      30   NP
    mem32   2+d(0-2)     -          -      -     46     44      46   NP