Abbreviations and legends
286+ Instruction executes only on an 80286 CPU
or later. Requires a p286 or p286n directive
to assemble. Appears as 'CPU: 286+' in text
entry.
P or p Instruction is normally used only in
system software (protected mode).
P Instruction is privileged in protected
mode, including V86 mode. Appears as 'Priv'
in text entry.
r Use of instruction is restricted.
IO Instruction is IOPL-sensitive in protected
mode, including V86 mode (CLI and STI only).
IOpm Instruction is IOPL-sensitive in protected
mode (except in V86 mode).
IOv86 Instruction is IOPL-sensitive in virtual
8086 mode (V86) only.
eBX BX or EBX, depending on operand-size attribute
or address-size attribute.
acc AL, AX or EAX unless specified otherwise
reg any general register
r8 any 8-bit register
r16 any general purpose 16-bit register
r32 any general purpose 32-bit register
r/m8 a one-byte operand that is either a byte
register or a byte from memory
r/m16 a word register or memory operand used for
instructions whose operand-size attribute is 16 bits
r/m32 a doubleword register or memory operand used for
instructions whose operand-size attribute is 32 bits
imm immediate data
imm8 immediate signed 8-bit value
imm16 immediate signed 16-bit value
imm32 immediate signed 32-bit value
mem memory address
mem8 address of 8-bit data item
mem16 address of 16-bit data item
mem32 address of 32-bit data item
mem48 address of 48-bit data item
rel8 a relative address (distance -128 to +127 bytes)
Flags * Changed to reflect the results of
instruction
0 Always cleared
1 Always set
- Unchanged
? Undefined after operation (flag may or may
not have changed)
BCD Binary-Coded Decimal
CPL Current Privilege Level (protected mode)
IOPL Input/Output Privilege Level (protected mode)
SMM System Management Mode
Instruction timings
n generally refers to a number of repeated counts
m in a jump or call,
286: bytes in next instruction
386/486: number of components in instruction
(each byte of opcode) + 1 (if immediate data)
+ 1 (if displacement)
EA cycles to calculate the Effective Address
8088/8086:
base = 5, index = 5, disp = 6
bp+di or bx+si = 7
bx+di or bp+si = 8
bp+di+disp or bx+si+disp = 11
bx+di+disp or bp+si+disp = 12
segment override = +2
286 - 486:
base+index+disp = +1 all others, no penalty
NP not pairable } pairing
UV pairable in the U pipe or V pipe } categories
PU pairable in the U pipe only } for
PV pairable in the V pipe only } Pentium
Instruction length
The byte count includes the opcode length and length of any required
displacement or immediate data. If the displacement is optional, it
is shown as d() with the possible lengths in parentheses. If the
immediate data is optional, it is shown as i() with the possible
lengths in parentheses.