Misc. output reg.      read 03CCh  write 03C2h

Layout  b7     VSP  Vertical sync polarity
        b6     HSP  Horizontal sync polarity
        b5     BP   Page bit for odd/even
        b4     DVD  (EGA only)
        b3     CS   Clock select 1
        b2     CS   Clock select 0
        b1     ER   Enable/Disable display RAM
        b0     IOA  I/O address select

- Sync polarity (bits 7-6)
        Bits are set as below for VGA displays that use sync polarity
        to determine screen resolution. Many newer multiple frequency
        displays are insensitive to sync polarity.

                b7 b6   Vertical size  Active lines
                0  0    Reserved       Reserved
                0  1    400 lines      414 lines
                1  0    350 -          362 -
                1  1    480 -          496 -

- Page bit for odd/even (bit 5)
        Selects which 64 KB memory page to use when the system is in
        the odd/even modes (modes 0,1,2,3, and 7), i.e. the modes that
        send even addresses to plane 0 and odd addresses to plane 1.

        0 : Select the low 64 KB page
        1 : Select the high 64 KB page

- Clock select (bits 3-2)                                CAUTION! 
        The horizontal frequency controls the number of pixels per
        line. The vertical frequency controls the number of lines per
        screen, and whether the display is color or mono. The monitor
        type used decides which clock frequencies are implemented.

                b3 b2   Frequency
                0  0    25 MHz (640 columns)
                0  1    28 MHz (720 -)
                1  0    Reserved for external clock
                1  1    Reserved for future expansion

- Enable RAM (bit 1)
        0 : Disable access of the video memory from the CPU
        1 : Enable access of the video memory from the CPU

- I/O address select (bit 0)
        0 : Selects the monochrome I/O address space (03B?h)
        1 : Selects the color I/O address space (03D?h)