PUNPCKLWD       Unpack (interleave) Low-order Words

PUNPCKLWD destination, source                        CPU: MMX

        Logic   mm(63..48) <- mm/m32(31..16)
                mm(47..32) <- mm(31..16)
                mm(31..16) <- mm/m32(15..0)
                mm(15..0)  <- mm(15..0)
    
    PUNPCKLWD interleaves the two low-order words of the source operand
    and the two low-order words of the destination operand and writes
    them to the destination.

    The destination operand is an MMX register. The source operand can
    either be an MMX register or a 64-bit memory operand. 

    When unpacking from a memory operand, only 32 bits are accessed.


    Note
    If the source operand is all zeros, this instruction converts words
    to unsigned doublewords.


    Opcode      Format
    0F 61 /r    PUNPCKLWD mm, mm/m64