PACKSSWB        Pack Words into Bytes (Signed with Saturation)

PACKSSWB destination, source                         CPU: MMX

        Logic
        mm(7..0)   <- SaturateSignedWordToSignedByte mm(15..0)
        mm(15..8)  <- SaturateSignedWordToSignedByte mm(31..16) 
        mm(23..16) <- SaturateSignedWordToSignedByte mm(47..32)
        mm(31..24) <- SaturateSignedWordToSignedByte mm(63..48)
        mm(39..32) <- SaturateSignedWordToSignedByte mm/m64(15..0)
        mm(47..40) <- SaturateSignedWordToSignedByte mm/m64(31..16)
        mm(55..48) <- SaturateSignedWordToSignedByte mm/m64(47..32)
        mm(63..56) <- SaturateSignedWordToSignedByte mm/m64(63..48)

    PACKSSWB packs four signed words from the source operand and four
    signed words from the destination operand into eight signed bytes in
    the destination register.
    If the signed value of a word is larger or smaller than the range of
    a signed byte, the value is saturated (in the case of an overflow to
    7Fh, and in the case of an underflow to 80h).

    The destination operand is an MMX register. The source operand can
    either be an MMX register or a 64-bit memory operand. 


    Opcode      Format
    0F 63 /r    PACKSSWB mm, mm/m64