WBINVD          Write-Back and Invalidate Cache      Flags: Not altered

WBINVD CPU: 486+ Priv

Logic WriteBack(InternalCaches)
Flush(InternalCaches)
SignalWriteBack(ExternalCaches)
SignalFlush(ExternalCaches)

Writes back all modified cache lines in the processor's internal
cache to main memory, invalidates (flushes) the internal caches, and
issues a special-function bus cycle that directs external caches to
also write back modified data.

After executing this instruction, the processor does not wait for
the external caches to complete their write-back and flushing
operations before proceeding with instruction execution. It is the
responsibility of hardware to respond to the cache write-back and
flush signals.

The WBINVD instruction is a privileged instruction. When the
processor is running in protected mode, the CPL of a program or
procedure must be 0 to execute this instruction. This instruction is
also a serializing instruction (see Serializing Instructions in
Chapter 7, Multiple Processor Management, of the Pentium Pro Family
Developer's Manual, Volume 3).

In situations where cache coherency with main memory is not a
concern, software can use the INVD instruction.


Protected Mode Exceptions
#GP(0) If the current privilege level is not 0.

Real Address Mode Exceptions
None.

Virtual 8086 Mode Exceptions
#GP(0) The WBINVD instruction cannot be executed at the virtual 8086
mode.


Note
The WBINVD instruction implementation-dependent; its function may be
implemented differently on future Intel Architecture processors.


Opcode Format
0F 09 WBINVD


Length and timing
Operands Bytes 8088 186 286 386 486 Pentium
- 2 - - - - ?? ??