Function:

This instruction is available only on the IIT (Integrated Information
Technology Inc.) math processors. The instruction performs a 4x4 matrix
multiply in one instruction using three banks of 8 floating point registers.
The operands must be loaded to a specific bank in a specific order using

Xn = (A00 * Xo) + (A01 * Xo) + (A02 * Xo) + (A03 * Xo)
Yn = (A10 * Yo) + (A11 * Yo) + (A12 * Yo) + (A13 * Yo)
Zn = (A20 * Zo) + (A21 * Zo) + (A22 * Zo) + (A23 * Zo)
Vn = (A30 * Vo) + (A31 * Vo) + (A32 * Vo) + (A33 * Vo)

Where Xo stands for the original X value and Xn for the result. Operands
must be loaded to the following registers in the specified banks in the
specified order.

          Before FMUL4X4             After FMUL4X4

                   bank              bank
          Register: 0    1    2      0

          ST(0)     Xo   A33  A31    Xn
          ST(1)     Yo   A23  A21    Yn
          ST(2)     Zo   A13  A11    Zn
          ST(3)     Vo   A03  A01    Vn
          ST(4)          A32  A30     ?
          ST(5)          A22  A20     ?
          ST(6)          A12  A10     ?
          ST(7)          A02  A00     ?

All four banks can be selected by using the bankswitching instructions,
but only bank 0, 1 and 2 make sense since bank 3 is an internal scratchpad.
The separate banks can contain 8 floating point numbers and may be used
with normal instructions. Each bank acts like an independent 287.
Provided the status of the status word is saved inbetween and restored
properly after a bankswitch each bank can be used simultaneously.

Alternatively you could keep an eye on the TOP and STACKPOINTER indicators,
making sure they are the same as before when initiating a bankswitch.
By using FFREE, FFREEP and FINCSTP or FDECSTP instructions you may manually
manipulate the stack.

This feature of the IIT chips can be used to perform complex operations
in registers with many components remaining the same for a large dataset,
only saving intermediary results to one memory location, bankswitching
to the next series of operands, loading that one operand and continuing the
calculation with the next set of operands already in that bank. This does
require another read into the new bank but may save time and memoryspace
compared to memory based operands or multiple pass algorithms with multiple
arrays of intermediary results.




FENI / FDISI  Enable /Disable Floating point interrupts
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