(or SS:ESP on 386+), after which (E)SP is decremented by a word or dword.


When pushing any register or value, the difference between 286+ and previous
CPUs is not visible and causes no problems.
However, when pushing SP (or ESP on 386+) the value pushed is different
between 286 and previous CPUs.

On CPUs prior to the 286, SP would be decremented and then pushed.
On 286+ however, SP gets pushed and then decremented, leaving a different
value on the stack for SP. On the 386+ the same is in effect when
pushing ESP

If PUSH mem on the 286 in Protected Mode causes a stack limit violation -
exception 0bh, the saved CS:IP will point _after_ the PUSH instead of _to_
it on some early 286.





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