Accessing the CMOS (Cont.)
Bitfields for AMI (PicoPower) sleep timeout:
Bit(s) Description (Table C085)
5-3 SLEEP timeout
000 disabled
001 1 minute
010 2 minutes
011 3 minutes
100 4 minutes
101 6 minutes
110 8 minutes
111 12 minutes
See Also: #C083,#C087
----------R6077------------------------------
CMOS 60h-77h - AMI WinBIOS - PCI chipset-specific setup information
----------R61--------------------------------
CMOS 61h - AWARD - POWER MANAGEMENT
Bitfields for AWARD power management:
Bit(s) Description (Table C086)
7 PM Event on HDD Ports Activity (1=enable)
6 PM Event on LPT Port Activity (1=enable)
5 PM Event on COM Port Activity (1=enable)
4 HDD Power Down on Suspend
0-3 HDD Power Down Time
0 Disabled
1-15 Time in Minutes
----------R62--------------------------------
CMOS 62h - AMI 1990 Hyundai super-NB368S notebook - ???
FFh when values from bios defaults
FEh when values from power up defaults
----------R62--------------------------------
CMOS 62h - AMI (Neptune) - number of last PCI bus in system
See Also: INT 1A/AX=B101h
----------R62--------------------------------
CMOS 62h - AMI (PicoPower) - HARD-DISK POWERDOWN
Bitfields for AMI (PicoPower) hard-disk powerdown timeout:
Bit(s) Description (Table C087)
3-0 hard-disk timeout in minutes (0000 = disabled)
See Also: #C085
----------R62--------------------------------
CMOS 62h - AWARD - POWER MANAGEMENT
Bitfields for AWARD power management:
Bit(s) Description (Table C088)
7-4 Standby Mode Setting (for User Defined)
0 Disabled
1 20 Seconds
2 1 Minute
3 5 Minutes
4 10 Minutes
5 15 Minutes
6 20 Minutes
7 30 Minutes
8 40 Minutes
0-3 Doze Mode Setting (for User Defined)
(See Standby Mode above)
----------R63--------------------------------
CMOS 63h - AWARD - POWER MANAGEMENT
Bitfields for AWARD power management:
Bit(s) Description (Table C089)
7 Disable PM Event on IRQ3 Activity (COM2) (1=disable)
6 PM Event on VGA Activity (1=enable)
5 ??? (Defaults to 1)
4 PM Event on PCI/ISA Master Activity (1=enable)
0-3 Suspend Mode Setting (for User Defined)
(See Standby Mode above)
----------R63--------------------------------
CMOS 63h - AMI (PicoPower) - BATTERY-LOW ACTIONS
Bitfields for AMI (PicoPower) battery-low actions:
Bit(s) Description (Table C090)
5-3 battery-very-low action
000 MAX
001 MAX/2
010 MAX/4
011 MAX/8
100 MAX/16
101 MAX/32
110 MAX/64
111 suspend
2-0 battery-low action (same as battery-very-low action)
----------R64--------------------------------
CMOS 64h - AMI 1990 Hyundai super-NB368S notebook - ???
----------R64--------------------------------
CMOS 64h - AMI (PicoPower) - BATTERY POWER
Bitfields for AMI (PicoPower) battery power:
Bit(s) Description (Table C091)
6 extended battery debounce enabled
4-3 resume with modem ring
00 disabled
01 one ring
10 two rings
11 three rings
2 365SL power on during suspend
1-0 suspend-mode DRAM refresh cycle
00 15 usec
01 120 usec (1/8 normal)
10 self
----------R64--------------------------------
CMOS 64h - AWARD - POWER MANAGEMENT - IRQ activity events
Bitfields for AWARD power management IRQ activity events:
Bit(s) Description (Table C092)
7 Disable PM Event on IRQ11 Activity (1=disable)
6 Disable PM Event on IRQ10 Activity (1=disable)
5 Disable PM Event on IRQ9 Activity (IRQ2 Redir) (1=disable)
4 Disable PM Event on IRQ8 Activity (RTC Alarm) (1=disable)
3 Disable PM Event on IRQ7 Activity (LPT1) (1=disable)
2 Disable PM Event on IRQ6 Activity (Floppy) (1=disable)
1 Disable PM Event on IRQ5 Activity (LPT2) (1=disable)
0 Disable PM Event on IRQ4 Activity (COM1) (1=disable)
----------R65--------------------------------
CMOS 65h - AWARD - POWER MANAGEMENT
Bitfields for AWARD power management:
Bit(s) Description (Table C093)
7-4 ??? may be unused. Defaults to all 1's
3 Disable PM Event on IRQ15 Activity (1=disable)
2 Disable PM Event on IRQ14 Activity (Hard Disk) (1=disable)
1 Disable PM Event on IRQ13 Activity (Coprocessor) (1=disable)
0 Disable PM Event on IRQ12 Activity (PS/2 Mouse) (1=disable)
----------R65--------------------------------
CMOS 65h - AMI (PicoPower) - PC PIN STAGGER
Bitfields for AMI (PicoPower) PC pin stagger:
Bit(s) Description (Table C094)
7-6 PC pin stagger period
00 immediate
01 4 msec
10 16 msec
11 64 msec
----------R66--------------------------------
CMOS 66h - AMI 1990 Hyundai super-NB368S notebook - DOZE MODE TIMEOUT
Note: doze mode timeout 00-0F, from table (0,12 -14 sec)
----------R6679------------------------------
CMOS 66h-79h - AWARD - ??? unused ???
Note: Defaults to all FFh's.
----------R67--------------------------------
CMOS 67h - AMI 1990 Hyundai super-NB368S notebook - SLEEP MODE TIMEOUT
Desc: sleep mode timeout 00-0F, units of 1 second
----------R68--------------------------------
CMOS 68h - AMI 1990 Hyundai super-NB368S notebook - SUSPEND MODE TIMEOUT
Desc: suspend mode timeout 01-0F, units of 5 minutes
----------R686F------------------------------
CMOS 68h-6Fh - AWARD - IDE hard disk params for first drive on second IDE port
----------R69--------------------------------
CMOS 69h - AMI 1990 Hyundai super-NB368S notebook - LCD MODE TIMEOUT
Desc: LCD mode timeout 01-0F, units of 1 minute
----------R6A--------------------------------
CMOS 6Ah - AMI 1990 Hyundai super-NB368S notebook - ???
----------R7077------------------------------
CMOS 70h-77h - AWARD - IDE hard disk params for second drive on second IDE port
----------R787D------------------------------
CMOS 78h-7Dh - AMI WinBIOS - used by BIOS as scratch RAM
----------R7A--------------------------------
CMOS 7Ah - AWARD - EXTENDED CMOS CHECKSUM (high byte)
Note: Award's extended checksum is the arithmetic sum of all the bytes
from 40h (64 decimal) through 79h (121 decimal). [42h-79h for v4.50G]
See Also: CMOS 7Bh"AWARD"
----------R7B--------------------------------
CMOS 7Bh - AWARD - EXTENDED CMOS CHECKSUM (low byte)
Note: Award's extended checksum is the arithmetic sum of all the bytes
from 40h (64 decimal) through 79h (121 decimal). [42h-79h for v4.50G]
See Also: CMOS 7Ah"AWARD"
----------R7E7F------------------------------
CMOS 7Eh-7Fh - AMI WinBIOS - used as scratch RAM by power management code
---------------------------------------------
From arhfond@online.ru Thu Sep 5 21:17:13 1996
Date: Wed, 28 Aug 1996 22:35:17 +0400
From: Agapov Vasiliy Pavlovich <arhfond@online.ru>
To: ralf@telerama.lm.com
Subject: Re: Ralf Brown's Interrupt List Release 42.
The problem with CMOS checksum layout for the new motherboards (1995-1996)
with AWARD, AMIBIOS (also AMIBIOS on Pentium motherboards produced beyond
1992) and several others is the following: they have added the second checksum
for the CMOS area from 40h to 7Ch. Any changes in the area concerned, always
result in "CMOS checksum failure. Defaults loaded...".
The problem is that every model of BIOS has its own location of the second
checksum and its own way of determining it. When you need to change some bytes
in the area from 40h to 7Ch you ought to determine checksum location. Here's
the Assembly code that finds out the location of the second CMOS checksum on
ANY motherboard. I've tested it on more than 10 different motherboards with
AMIBIOS and AWARD BIOS and it never failed.
Before starting this code make sure to load the 128 bytes of CMOS
data to the buffer at CMOS_DATA and assume DS as data area segment register.
START: CALL WHAT_CMOS
JC NO_SECOND_CHS
; Checksum location is in word at CHECKS_ADDRESS
NO_SECOND_CHS:
; There's no second checksum in this CMOS
END:
;******************************* SUBS **********************************
WHAT_CMOS: MOV SI,OFFSET CMOS_DATA+40H
MOV DI,OFFSET CMOS_DATA+7EH
CALL FIND_CMOS_CHS
JNC END_WCMOS
MOV SI,OFFSET CMOS_DATA+41H
MOV DI,OFFSET CMOS_DATA+7EH
CALL FIND_CMOS_CHS
END_WCMOS: RET
FIND_CMOS_CHS: XOR DX,DX
MOV AX,DX
FIND_CMOS_C1: LODSB ; GET BYTE
ADD DX,AX
CMP SI,OFFSET CMOS_DATA+7CH ; ADDRESS OF CHECKSUM ?
JB FIND_CMOS_C1
XCHG DH,DL
CMP DX,[SI] ; CHECKSUM FOUND ?
JZ END_FCMOS
XCHG DH,DL
CMP SI,DI
JB FIND_CMOS_C1
STC
RET
END_FCMOS: MOV [CHECKS_ADDRESS],SI ; SAVE CHECKSUM POSITION
CLC
RET
******************************** DATA *******************************
CHECKS_ADDRESS DW 0
CMOS_DATA DB 128 DUP (?)
Regards,
Alexey Podrezov
28.08.1996
--------!---Admin----------------------------
Highest Table Number = C094
--------!---History--------------------------
Revision History
v1.26 Sep, 1995 reformatted (Ralf)
v1.25 June 1995 Added AMI WinBIOS info from Daniel Miller (Ralf)
v1.24 Jan, 1995 Added Award info from Tim Farley (Ralf)
v1.23 June, 1994 Added some MCA info from _The_Undocumented_PC_
v1.22 Feb, 1994 Added NMI mask note
v1.21 Jan, 1994 Added note for PS/2 checksum found
v1.20 Sept, 1993 PHOENIX data from Wim Osterholt added
additional AMI data from Howie (hjh@gwd.dst.gov.au)
v1.15 June, 1993 AMSTRAD data updated
v1.1 June, 1993 AMSTRAD & PS/2 data added
v1.0 June, 1993 First release: Motorola MC 146818, PC-AT & AMI
"Hi-Flex" information baselined
--------!---CONTACT_INFO---------------------
Internet: ralf@pobox.com (currently forwards to ralf@telerama.lm.com)
UUCP: {uunet,harvard}!pobox.com!ralf
FIDO: Ralf Brown 1:129/26.1
or post a message to me in the DR_DEBUG echo (I probably won't see it
unless you address it to me)